Unmasking semiconductors

European researchers have developed a solution to ‘mask-less’ semiconductor lithography. Mask-less lithography (ML2) promises to reduce the costs and production times associated with low-volume device manufacture and prototyping.

A mask is a type of template that allows semiconductor manufacturers to print the circuit design onto a silicon wafer for microchip production. Masks are expensive and several are needed for one chip.

“The cost of masks is also rising as chip features become smaller and more sophisticated,” said Hans Loeschner, CTO-marketing, IMS Nanofabrication, Austria, and administrator of the RIMANA (radical innovation maskless nanolithography) project.

The RIMANA project was set up to demonstrate the feasibility of a new technique for mask-less lithography, called PML2 (projection mask-less lithography).

It uses a variety of technologies in combination to burn a chip without a mask.

Further development on the RIMANA concept, Dr Burn Lin, senior director of the lithography division of the Taiwan Semiconductor Manufacturing Company believes, could push the technology to respond to even greater challenges in the semiconductor lithography space.

Semiconductor lithography is essentially printing for microchips. The chips are printed with the tiny channels, gates and transistors that make up modern integrated circuits.

“Just like the printing industry, you have different printing machines for different purposes. A newspaper would have an enormous printer installation, that would be like Intel or AMD producing microprocessor chips or Micron and Samsung printing memory chips, but other solutions are needed for small print-runs and one-off projects,” said Loeschner.

As semiconductors for all applications become more sophisticated, current solutions to the problem are no longer adequate to meet demand.

“The industry needs a cost-effective and fast system, and now. There is already demand for a system that can produce chips for low-volume applications, for device development and for rapid prototyping,” Loeschner reveals.

The EU-funded RIMANA project looked at a combination of established technologies for a radical potential solution.

“The idea behind PML2 has been around for a long time — a similar system was proposed already in the 1980s, but there were problems that were impossible to solve at the time,” Loeschner states.

The project’s solution does not use a single electron beam direct write unit, which is normally used to make masks. Instead, the PML2 technology uses an electron beam that is directed to an aperture plate system that splits the beam into many thousands of smaller beams.

Next, a blanking plate may deflect individual beams. Only the undeflected beams are projected to the silicon wafer surface to create a pattern, and that pattern is needed for the circuit fabrication.

But that simple explanation overlooks a large number of major innovations. For example, the company found a way to reduce by 200 the small beams produced by the aperture.

“A 25 mm diameter electron beam could be split into many hundred thousand micrometre-sized beams, and we then reduce those beams down to less than 20 nanometres,” said Loeschner.

RIMANA tested its technology on 32 and 22 nm half-pitch (hp) circuit patterns. A smallest resolution of just 16 nm hp was achieved, surpassing the 22 nm hp target of the RIMANA project.

Now, lead partner IMS Nanofabrication, together with the RIMANA partners, is putting the finishing touches to a programmable blanking plate.

This uses an integrated CMOS electronics to control beam deflection and is a major advance for the technology because it means that the patterns created by the PML2 system can be changed quickly.

IMS Nanofabrication is in talks to develop the current prototype into a commercial model, possibly as early as 2011.

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