Measuring the toughness of thin insulating films

Researchers at the National Institute of Standards and Technology (NIST) have developed a method to measure the toughness, the resistance to fracture, of thin insulating films.

This could improve the reliability and manufacturability of ICs and it’s one that microelectronics manufacturers can use with equipment they already own.

At issue is the mechanical strength of ‘low-k’ dielectric layers, electrically insulating films only a couple of micrometres thick that are interleaved between layers of conductors and components in microprocessor chips and other high-performance semiconductor devices.

As IC features, like transistors, have become smaller and crammed more closely together, designers are faced with preventing electrical interference or ‘crosstalk’ by making the insulating films more and more porous with nanoscale voids, but this has also made them more fragile.

Brittle fracture failure of low-k insulating films remains a problem for the industry, affecting both manufacturing yields and device reliability.

Currently, there is no accurate method to measure the fracture resistance of such films, which makes it difficult to design improved dielectrics.

The researchers believe they have found an answer to the measurement problem in a new adaptation of a materials test technique called nanoindentation. It works by pressing a sharp, hard object and observing how much pressure it takes to deform the material.

For roughly 20 years, researchers have known how to measure elasticity and plasticity of materials at very small scales with nanoindenters. But toughness, the force needed to actually break the material, has been more difficult to define. Thin films were particularly problematic because they must be layered on top of another stronger material, such as a silicon wafer.

The NIST technique requires a slight modification of the nanoindentation equipment; the probe has to have a sharper, more acute point than normally used and a hefty dose of theory.

Pressing carefully on the dielectric film generates cracks as small as 300 nm, which are measured by electron microscopy.

Just how the cracks form depends on a complex interaction involving indentation force, film thickness, film stress and the elastic properties of the film and the silicon substrate.

These variables are plugged into a new fracture mechanics model that predicts not only the fracture toughness but also another key value — the critical film thickness for spontaneous fracture.

Using this methodology, device manufacturers will be able to eliminate some candidate interconnect dielectric films from consideration without further expensive device testing.