Package enhanced

National Instruments has released LabVIEW 7.1, an upgrade to the family of LabVIEW graphical development products.

This latest version extends Express technology to automated instrumentation and real-time applications with new Express VIs for NI modular instruments and NI-DAQmx, debugging and low-level execution timing for the LabVIEW 7.1 real-time module.

With five new Express VIs for NI digitisers, signal generators and high-speed digital I/O, engineers can configure measurements and acquire data with a few mouse clicks.

The redesigned NI-DAQmx measurement services software in LabVIEW 7.1, available in real-time applications for the first time, increases performance of single-loop PID applications by 30% and simplifies hardware-timed loop implementation. In addition, the new LabVIEW 7.1 PDA module delivers more data acquisition functionality, including faster multichannel acquisition and analog and digital triggering.

Engineers can use this module to create customised handheld DMM applications and communicate with Bluetooth-enabled devices.

The package also introduces execution timing and graphical debugging for low-level control and visibility of real-time system execution.

With the timed loop, an enhanced while loop in LabVIEW, engineers can specify precise timing of code segments, co-ordinate multiple activities and define priority-based loops for creating multirate applications.

Engineers can also use the execution trace toolkit with the real-time module to identify sources of jitter, such as memory allocation and race conditions.

In addition to speeding development of real-time applications on existing platforms, this release extends LabVIEW Real-Time to run on certified desktop PCs.

Engineers now can create real-time systems by integrating the large installed base of PCI I/O hardware with desktop PCs.

The FPGA module, which is also released with LabVIEW 7.1, improves efficiency and functionality of embedded FPGA applications. The latest version features single-cycle while loops that execute multiple functions within a single 25 ns of the 40 MHz global clock.

With this feature, engineers can use LabVIEW to develop FPGA code that executes as efficiently as hand-coded VHDL.