FIFO devices

Averlogic Technologies has introduced its AL4C range of communication FIFO products. FIFO or queuing devices allow simultaneous memory data write and read operations through a set of independent control signals (write/read clocks, enables).

Multiple devices can be connected in parallel to increase data bus width enhancing system performance or cascaded in serial to prolong the FIFO depth for longer delay.

Their easy-to-use interface reduces development time and effort. They are widely used in communication data buffering applications, such as ATM switches, high-end routers, wireless base stations and SONET (synchronous optical network).

The asynchronous X9 bus width AL4CA series is offered in five densities from 4 to 64 K with 12 ns speed, 3.3 V operation and a 32-pin PLCC package.

The synchronous AL4CS series offers the same range of densities in both X9 and X18 bus width versions.

Operating at 133 MHz and 3.3 V, the AL4CS series is available in 32-pin PLCC, a 32-pin TQFP, 64-pin TQFP and 64-pin STQFP packages.

Both series are industry compatible, but go further offering designers additional programmable status flags.

Complementing the AL4CS series is the company's feature-enhanced AL4CE series. Mirroring the 'CS' in both density range and bus widths, this series includes features found typically only in the higher density devices of others, such as data retransmit, making single data write and multiple data read functions possible.

Bus matching is supported in X18 versions of the 'CE' allowing designers to configure the write or read buses as either 9 bit or 18 to inter-convert bus width without the need for additional glue logic. Endian select is also supported enabling swapping of the byte sequence when data is read out at the data port.