ADC for low signals

A 16 bit, 130 Msps ADC by Linear Technology has a spurious-free dynamic range performance of 100 dBc, combined with a 78 dB signal-to-noise ratio, enabling it to resolve low level signals in the presence of large interferers and blockers. The LTC2208 is claimed to be the fastest 16 bit, high performance ADC available.

The family innovates ADC technology for digital receivers by incorporating two features that simplify receiver design and improve system performance.

The first is an internal transparent dither circuit that improves the ADC's spurious-free dynamic range response well beyond 100 dBc for low level input signals. The second feature is a digital output randomiser that reduces unwanted tones caused by digital feedback. The flexible digital outputs can be run as CMOS or LVDS.

The device also features a programmable gain amplifier front end that eases the ADC driver output power requirements when driving the lower input range of 1.5 Vp-p. This improves the distortion performance and power consumption of the driver with minimal impact on ADC noise performance.

The device packages deliver power consumption at 1250 mW without the need for heat sinking. Both the power consumption and total solution size with integrated bypass capacitance are less than half that of the nearest competitor.

It requires a single 3.3 V supply for operation and comes with a clock duty cycle stabiliser for maintaining the ADC performance over varying duty cycles. The ADC can accept high frequency, wide dynamic range signals, offering an analog input bandwidth of 700 MHz.

The family includes speed grades of 130, 105, 80, 65, 40, 25 and 10 Msps all with good SFDR and SNR performance. In addition to the 16 bit parts, 14 bit versions of this family will also be available.