Non-damaging high-K removal process

International Sematech (ISMT) has developed an etch process that allows the removal of high-k film from a wafer surface without damaging the underlying silicon.

It could lead the way to implemetation of advanced gate stacks, for IC transistors.

The process was conducted within ISMTs Advanced Technology Development Facility on 200 mm wafers at the 130 nm technology node.

The etch process removed hafnium dioxide (HfO2) deposited by metal organic chemical vapour deposition and atomic layer deposition processes. This process was able to remove HfO2 after post-deposition annealing without causing damage to, or loss of, silicon material in the source-drain region, which is critical to the transistor series resistance and thus its maximum current.

A high-k material has a dielectric constant ('k' value) larger than silicon dioxide, the industry standard gate dielectric material, thereby allowing retention of the gate capacitance even as the physical thickness difference results in high-k materials having much lower leakage current than silicon dioxide at an equivalent electrical thickness.

High-k materials are required for continued gate dielectric scaling in high performance applications and for reduced leakage current in lower power (ie. mobile) applications.