Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019


3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

Planning a scalable long-term wireless strategy

Operators in many markets are transitioning to 3G and 4G technologies, whilst other operators...

New highly efficient bidirectional DC-DC converter for DC-BUS and battery bank interface

With the growth in use of renewable sources of power, the energy storage systems (ESS) market,...

Why touch technology won’t eliminate physical controls

What types of industrial human machine interface (HMI) designs and functionalities do...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd