Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019


3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

Augmented reality now solving real-life problems — an eBook

Imagine being able to see inside a patient rather than viewing scans or X-rays. Imagine being...

Enabling Mechatronics Product Development with Digital Prototyping

This white paper features information on how Digital Prototyping enables manufacturers to...

Next-gen simulation tools for high-speed digital design

Learn how simulation tools as part of a modern PI workflow can prevent your failure rate...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd