Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019


3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

Make solid design choices with stimulus-response measurements

Learn about how common stimulus-response measurements can maximise your product. Examine...

Internet of Things (IoT) and big data combine forces

A primary driving force behind the IoT and big data has been the collection and analysis of...

Valuable insights on obsolescence from the aerospace and defence industry

Discover insights identified to meet the obsolescence challenges you face today. Examine...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd