Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019


3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

The latest innovations in service robotics — an eBook

In this eBook, explore leading-edge service robots that provide an extraordinary experience in...

New generation LCD resizing technology

Large-sized LCD displays have limitations – poor aspect ratio, high power consumption...

Factorised Power Architecture — achieving high density and efficiency in board-mounted power

Solving today's high-current and high-density point-of-load (PoL) problems requires a...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd