Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019


3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

How to determine the TCO of your embedded system

Traditional TCO metrics for embedded systems are now worthless. For an accurate idea of...

How to build a smarter ultra-wide DC-DC converter

Learn how to design an ultra-wide DC-DC converter using multiple parts and maximise your...

Advanced cooling for small form factor electronics

As processors become more powerful, system power consumption increases along with the...


  • All content Copyright © 2026 Westwick-Farrow Pty Ltd