Semiconductor protection tips for 3-level topologies
Supplied by Semikron Pty Ltd on Monday, 21 October, 2019
3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.
This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.
This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.
Related White Papers
Fast startup solutions for sensorless motors
Learn how to solve various problems that tend to occur with sensorless motors, making it possible...
The future of standardised defence platforms using MOSA, SOSA and VPX open architectures
Learn about the MOSA, SOSA and VPX approach to...
How to design military-grade, rapid-start power applications
Learn about the critical areas of consideration when designing an isolated power system...
