Semiconductor protection tips for 3-level topologies

Supplied by Semikron Pty Ltd on Monday, 21 October, 2019

3-level topologies are mainly used in UPS and solar applications due to their high efficiency and low harmonic distortion of the grid. Essential for the design of the driver is to limit the voltage at the IGBT and handling of short circuits.

This application note describes the control and protection of power semiconductors in 3-level NPC and TNPC topologies.

Related White Papers

Valuable insights on obsolescence from the aerospace and defence industry

Discover insights identified to meet the obsolescence challenges you face today. Examine...

Sustainability for manufacturers: driving profitability and growth

This white paper encourages manufacturers to integrate sustainability into their corporate...

Test engineering insights from aerospace and defence

You are evaluated on your ability to manage cost and risk, whether you’re working on your next...

Content from other channels on our network

Siemens expands Queensland manufacturing facility

Customer demand exceeding capacity for Alpha HPA

Curtin University project to research sustainable gallium processing

How to extend the life of your motor bearings

Mars Petcare Wodonga expansion boosts manufacturing output

Australia's EnergyConnect project is almost ready to go live

Funding boost for electric road freight

Siemens and Infineon collaborate on solid-state circuit breakers

Trial supports stranded EV drivers

Renewable energy infrastructure must be built at 'warp speed': report

Securing the new financial year: prioritising autonomous cyber defence

Cohesity develops headless data security architecture

Australia's 'missing middle' AI capabilities

Banking security leaders see AI as the industry's top threat

AI is exposing the real problem in enterprise IT: infrastructure

All content Copyright © 2026 Westwick-Farrow Pty Ltd