MEMS inside a CMOS wafer

Baolab Microsystems has developed a technology to construct nanoscale MEMS (micro electro mechanical systems) within the structure of the actual CMOS wafer itself using standard, high-volume CMOS lines, which is much easier and quicker with fewer process steps than existing MEMS fabrication techniques that build the MEMS on the surface of the wafer.

This is claimed to reduce the costs of a MEMS by up to two thirds and even more if several different MEMS are created together on the same chip.

The technology uses the existing metal layers in a CMOS wafer to form the MEMS structure using standard mask techniques. The inter metal dielectric is then etched away through the pad openings in the passivation layer using vapour HF.

The etching uses equipment that is already available for volume production and takes less than an hour, which is insignificant compared with the overall production time. The holes are then sealed and the chip packaged as required. As only standard CMOS processes are used, NanoEMS MEMS can be directly integrated with active circuitry.

The company has created MEMS devices using standard 0.18 µm 8″ volume CMOS wafers with four or more metal layers and has achieved minimum feature sizes down to 200 nm. This is smaller than is currently possible with conventional MEMS devices, bringing these devices into the realm of nanostructures, with the additional benefits of smaller sizes, lower power consumption and faster waking.

The company will be making a range of discrete MEMS including RF switches, electronic compasses and accelerometers, along with solutions that combine several functions in one chip.

The prototype stage has already proved the technology and evaluation samples with be available later this year. These are aimed at handset designers and manufacturers, and power amplifier and RF front end module markets.