Bonding of copper electrodes using silver

Scientists from Osaka University have developed a new method for the direct three-dimensional bonding of copper electrodes using silver, which can reduce the cost and energy requirements of new electronic devices. Their study may help in the design of next-generation smart devices that are more compact and use less electricity.

Three-dimensional integrated circuits are playing an increasingly important role in electronic devices. Compared with conventional 2D circuits, these architectures can save both space and reduce the material required for interconnecting wires. However, the ability to form reliable 3D connections requires new methods compared with the mature technologies in use for conventional integrated circuits.

Now, researchers at Osaka’s Flexible 3D-System Integration Laboratory have shown how to directly connect copper electrode ‘bumps’ using silver layers. Silver is first sputtered onto the two copper surfaces to be bonded at room temperature; heat is then applied to anneal the silver layers, which caused the surface to undergo microscopic changes in a process called ‘stress migration’.

The release of the stress during annealing led to surface roughening, which ensured a sufficient effective area between the two silver layers. As a result, bonding could be accomplished without applied pressure even at a comparative low annealing temperature.

Permanent connections as small as 20 µm could be realised in just 10 minutes this way. This process also requires only moderate temperatures (180°C) and can work under atmospheric conditions.

“Our process can be performed under gentle conditions, at relatively low temperatures and without added pressure, but the bonds were able to withstand over 1000 cycles of thermal shocking from -55 to 125°C,” said first author Zheng Zhang. The team was able to confirm the surface roughness of the sputtered and annealed chips using images from scanning electron microscopy and atomic force microscopy.

“This technology is expected to contribute to chips with a high density of interconnects and advanced 3D packaging,” concluded senior author Katsuaki Suganuma.

Image caption: Cross-sectional image of the bonded Cu-Ag bump. Image credit: Katsuaki Suganuma.

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