IBM scientists set new speed record for big data

IBM has achieved a new technological advancement that is expected to help improve internet speeds to 200-400 gigabits per second (Gbps) at extremely low power.

The technology, which is only a lab prototype, is based on a device that can be used to improve transferring big data between clouds and data centres 4x faster than current speeds. At this speed, 160 gigabytes - the equivalent of a two-hour, 4K ultra high definition movie or 40,000 songs - could be downloaded in only a few seconds.

The device was presented at the International Solid-State Circuits Conference (ISSCC) in San Francisco.

To support the exponential increase in internet traffic, scientists at IBM Research and Ecole Polytechnique Fédérale de Lausanne (EPFL) have been developing ultrafast and energy-efficient analog-to-digital converter (ADC) technology to enable complex digital equalisation across long-distance fibre channels.

An ADC converts analog signals to digital, approximating the right combination of zeros and ones to digitally represent the data so it can be stored on computers and analysed for patterns and predictive outcomes.

For example, scientists will use hundreds of thousands of ADCs to convert the analog radio signals that originate from the Big Bang 13 billion years ago to digital. It’s part of a collaboration called Dome between ASTRON, the Netherlands Institute for Radio Astronomy, DOME-South Africa and IBM to develop a fundamental IT roadmap for the Square Kilometre Array (SKA), an international project to build the world’s largest and most sensitive radio telescope.

The radio data that the SKA collects from deep space is expected to produce 10 times the global internet traffic and the prototype ADC would be a suitable candidate to transport the signals fast and at very low power - a critical requirement considering the thousands of antennas which will be spread over 3000 kilometres.

“Our ADC supports IEEE standards for data communication and brings together speed and energy efficiency at 32 nanometres enabling us to start tackling the largest big data applications,” said Dr Martin Schmatz, systems department manager at IBM Research. “With Semtech as our partner, we are bringing our previous generation of the ADC to market less than 12 months since it was first developed and tested.”

Semtech signed a non-exclusive technology licensing agreement, including access to patented designs and technological know-how, with IBM to develop the technology for its own family of products ranging from optical and wireline communications to advanced radar systems.

“Through leveraging the IBM 32 nm SOI process with its unique feature set, we are developing products that are well suited for meeting the challenge presented by the next step in high-performance communications systems such as 400 Gbps Optical systems and Advanced Radar systems. We are also seeing an expanding range of applications in the existing radiofrequency communications marketplace where high-speed digital logic is replacing functions that have been traditionally performed by less flexible analog circuitry,” said Craig Hornbuckle, chief systems architect, Semtech.

The 64 GS/s (gigasamples per second) chips for Semtech will be manufactured at IBM’s 300 mm fab in East Fishkill, New York, in a 32-nanometre silicon-on-insulator CMOS process, with an area of 5 mm². This core includes a wide tuning millimetre wave synthesiser enabling the core to tune from 42 to 68 GS/s per channel with a nominal jitter value of 45 femtoseconds root mean square. The full dual-channel 2x64 GS/s ADC core generates 128 billion analog-to-digital conversions per second, with a total power consumption of 2.1 W.