Display interface

Tuesday, 07 September, 2004 | Supplied by: http://www.braemac.com.au/


STMicroelectronics has introduced a transmitter that converts 24 bits of video data into four LVDS channels to drive a flat-panel display.

The use of LVDS signalling reduces the size and cost of the cable connecting to a display.

The STLVDS385B transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (low voltage differential signalling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.

The device supports input clock rates of 20 to 85 MHz. During each cycle of the transmit clock, 28 bits of input data, eight bits each of R, G and B data and four control and timing bits, are sampled and transmitted.

At a transmit clock frequency of 85 MHz, each LVDS channel transmits this data to the flat panel display at 595 Mbps. This is equivalent to a total throughput for the four channels of 297.5 MBps.

The part supports flat panel displays with VGA, SVGA, XGA resolutions and single/dual-pixel SXGA resolutions.

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