Vertical nanowires standing tall


Friday, 02 September, 2016

Vertical nanowires standing tall

Hokkaido University researchers have demonstrated a method of making vertical nanowires with full control over their size, density and distribution over a semiconducting substrate. Their work contrasts with the current use of bottom-up fabrication techniques that result in vertical nanowires being randomly distributed on semiconducting substrates, limiting their usability.

The team created an indium arsenide (InAs) nanowire template from which to grow the desired heterojunction nanowires, which were composed of ferromagnetic manganese arsenide (MnAs) and semiconducting InAs. They produced the InAs nanowire template by precisely patterning circular openings in silicon dioxide thin films, which were deposited by plasma sputtering onto wafers.

Next, the researchers grew single InAs nanowires in each circular hole. The MnAs nanowires formed either inside (in the middle) or on top of the InAs nanowires by a process known as ‘endotaxy’ — orientated crystal growth inside another crystal. The nanowires had a hexagonal structure, exhibiting no defects or dislocations and no contamination with other elements.

The researchers say their nanowires could prove invaluable in next-generation sensing devices for electronic, photonic and biochemical applications. In fact, the team has already characterised the magnetotransport properties of the nanowires for the potential fabrication of vertical spintronic devices.

The research has been published in the Japanese Journal of Applied Physics.

Image caption: The electron micrograph (a) shows a typical InAs nanowire template array and (b) a heterojunction MnAs/InAs nanowire array. The ferromagnetic nanowires grow either inside (in the middle) or on top of the semiconducting nanowires, providing interesting electronic properties for future applications. Image courtesy of The Japan Society for Applied Physics under CC BY 4.0

Related News

3D semiconductor chip alignment boosts performance

Researchers have developed an ultra-precise method to align 3D semiconductor chips using lasers...

Researchers achieve 8 W output from optical parametric oscillator

Researchers have demonstrated a total output power of 8 W from a high-power mid-infrared cadmium...

"Dualtronic" chip for integrated electronics and photonics

Cornell researchers have developed a dual-sided chip known as a "dualtronic" chip that...


  • All content Copyright © 2024 Westwick-Farrow Pty Ltd