Transistor Holy Grail nearer

Better switching performance of transistors of disordered silicon films can be achieved by making the conduction channel in the device very thin, according to research at the University of Surrey in England.

Researchers at the Advanced Technology Institute of the university, in collaboration with the Hitachi Central Research Laboratory in Japan, have experimentally and theoretically demonstrated this effect.

A higher ION/IOFF ratio can be achieved for devices with a 2 nm-thick channel.

This work could lead engineers closer to the Holy Grail of transistor design that requires high performance at reduced cost over very large substrate areas.

Transistors on cheap and flexible substrates like glass and plastics are currently unable to deliver performance and do not lend themselves to seamless monolithic integration of increased electronic functions on human interface devices (displays and sensors).

At present, high-performance transistors are only available in crystalline materials which are expensive and have to be attached ex situ onto larger area substrates, which adds to the expense and complexity of system design.

If both the electronics and display substrates can be integrated onto one platform, it would usher a new dawn in immersive and personal electronics.

However, in general, the deposition of semiconductor films used to make transistors on such substrates has to be carried out at low temperatures to preserve substrate integrity. As a result, the quality of the organic or inorganic semiconductor films is severely constrained, and has a dramatic influence on transistor performance.

In a recent report to be published in Science — 'Engineering Perspectives' — backed by a further paper to appear in IEEE Electron Device Letters, engineers propose the use of clever transistor structure designs to overcome some of the issues.

In the first collaborative work with Hitachi Central Research Laboratory, Japan, researchers at the Advanced Technology Institute of the University of Surrey have experimentally and theoretically demonstrated that for transistors of disordered silicon films, superior switching performance (low leakage current, and steep sub-threshold slope) can be achieved by making the conduction channel in the transistor very thin.

A higher ION/IOFF ratio, which exceeds 1011, can be achieved for devices with a 2.0 nm-thick channel.

Other work from the same research laboratory at Surrey is on the source-gated transistor (SGT) concept by  Prof John Shannon. Compared to a field-effect transistor, the SGTs can operate with very short source-drain separations even with a thick gate insulator layer to achieve high speed, good stability and superior control of current uniformity.