Samsung demonstrates MRAM-based in-memory computing

Samsung Electronics has demonstrated what it claims to be the first in-memory computing based on MRAM (magnetoresistive random-access memory).

Described in the journal Nature, Samsung’s new research showcases the company’s efforts to merge memory and system semiconductors for next-generation artificial intelligence (AI) chips. It was led by the Samsung Advanced Institute of Technology (SAIT) in collaboration with the Samsung Electronics Foundry Business and Semiconductor R&D Center.

In the standard computer architecture, data is stored in memory chips and data computing is executed in separate processor chips. In contrast, in-memory computing is a new computing paradigm that seeks to perform both data storage and data computing in a memory network. Since this scheme can process a large amount of data stored within the memory network itself without having to move the data, and also because the data processing in the memory network is executed in a highly parallel manner, power consumption is substantially reduced. In-memory computing has thus emerged as one of the promising technologies to realise next-generation low-power AI semiconductor chips.

For this reason, research on in-memory computing has been intensely pursued worldwide. Non-volatile memories, in particular RRAM (resistive random-access memory) and PRAM (phase-change random-access memory), have been actively used for demonstrating in-memory computing. By contrast, it has so far been difficult to use MRAM — another type of non-volatile memory — for in-memory computing, despite MRAM’s merits such as operation speed, endurance and large-scale production. This difficulty stems from the low resistance of MRAM, due to which MRAM cannot enjoy the power reduction advantage when used in the standard in-memory computing architecture.

Samsung Electronics researchers have now succeeded in developing an MRAM array chip that demonstrates in-memory computing by replacing the standard ‘current sum’ in-memory computing architecture with a new ‘resistance sum’ in-memory computing architecture, which addresses the problem of small resistances of individual MRAM devices. The research team subsequently tested the performance of this MRAM in-memory computing chip by running it to perform AI computing. The chip achieved an accuracy of 98% in classification of hand-written digits and 93% accuracy in detecting faces from scenes.

By ushering MRAM into the realm of in-memory computing, the team’s work expands the frontier of the next-generation low-power AI chip technologies. The researchers have also suggested that not only can this new MRAM chip be used for in-memory computing, but it also can serve as a platform to download biological neuronal networks.

“In-memory computing draws similarity to the brain in the sense that in the brain, computing also occurs within the network of biological memories, or synapses; the points where neurons touch one another,” said Dr Seungchul Jung, first author of the paper. “In fact, while the computing performed by our MRAM network for now has a different purpose from the computing performed by the brain, such solid-state memory network may in the future be used as a platform to mimic the brain by modelling the brain’s synapse connectivity.”

Image credit: ©stock.adobe.com/au/AliFuat

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