Researchers demonstrate scalable, fully coupled annealing processor


Monday, 10 October, 2022


Researchers demonstrate scalable, fully coupled annealing processor

Researchers at Tokyo University of Science (TUS) have developed a new approach to realising scalable, fully coupled annealing processors.

Annealing processors are more energy efficient and quicker at solving mathematical optimisation problems than PCs — the quantum-inspired systems developed by the researchers in Tokyo can model the interactions between magnetic spins and use it to solve complex optimisation problems. The new method outperforms modern CPUs and shows potential for applications in drug recovery, artificial intelligence and materials science.

While mathematically formulated, “combinatorial optimisation problems” are common in the real world and can occur across several fields, including logistics, network routing, machine learning and materials science. However, large-scale combinatorial optimisation problems are very computationally intensive to solve using standard computers, making researchers turn to other approaches. One such approach is based on the “Ising model”, which mathematically represents the magnetic orientation of atoms, or ‘spins’, in a ferromagnetic material. At high temperatures, these atomic spins are oriented randomly. But as the temperature increases, these spins line up to reach the minimum energy state where the orientation of each spin depends on its neighbours. This process, known as ‘annealing’, can be used to model combinatorial optimisation problems such that the final state of the spins yields the optimal solution.

Researchers have tried creating annealing processors that mimic the behaviour of spins using quantum devices and have attempted to develop semiconductor devices using large-scale integration (LSI) technology that aims to do the same. Professor Takayuki Kawahara’s research group at TUS in Japan have made progress in this particular field. In 2020, Kawahara and his colleagues presented at the 2020 international conference IEEE SAMI 2020, one of the first fully coupled — accounting for all possible spin-spin interactions instead of interactions with only neighbouring spins — LSI annealing processors, comprising 512 fully connected spins. These systems can be hard to implement and upscale, due to the sheer number of connections between spins that must be considered. While using multiple fully connected chips in parallel was a potential solution to the scalability problem, this made the required number of interconnections (wires) between chips prohibitively large.

In a recent paper published in Microprocessors and Microsystems, Kawahara and his fellow researchers demonstrated a solution to this problem by developing a new method in which the calculation of the system’s energy state was divided among multiple fully coupled chips first, forming an ‘array calculator’. A second type of chip, called ‘control chip’, then collected the results from the rest of the chips and computed the total energy, which was used to update the values of the simulated spins.

“The advantage of our approach is that the amount of data transmitted between the chips is extremely small. Although its principle is simple, this method allows us to realise a scalable, fully connected LSI system for solving combinatorial optimisation problems through simulated annealing,” Kawahara said.

The researchers implemented their approach using commercial FPGA chips, which are widely used programmable semiconductor devices. They built a fully connected annealing system with 384 spins and used it to solve several optimisation problems, including a 92-node graph colouring problem and a 384-node maximum cut problem. These proof-of-concept experiments showed that the proposed method brings true performance benefits; compared with a standard modern CPU modelling the same annealing system, the FPGA implementation was 584 times faster and 46 times more energy efficient when solving the maximum cut problem.

With this demonstration of the operating principle of their method in the FPGA, the researchers plan to produce a custom-designed LSI chip to increase the capacity and improve the performance and power efficiency of their method. “This will enable us to realise the performance required in the fields of material development and drug discovery, which involve very complex optimisation problems,” Kawahara said.

Kawahara said that he also aims to promote the implementation of the research findings to solve real problems in society. The researchers hope to engage in joint research with companies and bring their approach to the core of semiconductor design technology, leading to the revival of semiconductors in Japan.

Image credit: iStock.com/krystiannawrocki

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