Wafer bonding - a key technology

Yole Développement has published its technology study and market research report: Permanent wafer bonding report.

Historically developed for MEMS and SOI substrates, the wafer bonding technology is today becoming a key processing technology for a wide range of applications: MEMS, CMOS image sensors, LEDs, power devices, RF and advanced packaging.

The market is complex, crossing different wafer sizes (from 2 to 12″), different applications (advanced substrates such as SOI, MEMS, LEDs, CMOS image sensors, power devices, RF devices and advanced packaging) and different bonding technologies (adhesive, anodic, fusion, direct oxide, eutectic, glass frit, metal diffusion).

Yole Développement’s report aims at giving a vision, crossing what the wafer bonding technologies will be over the period 2010-2016.

Wafer bonding is usually defined as a process that temporarily or permanently joins two wafers or substrates using a suitable process. Historically developed for MEMS and then SOI wafers, technology has shifted to non-mainstream IC applications over the last years. This report aims at analysing the market perspectives and technical trends for permanent bonding.

“MEMS has been the first application where wafer bonders have been massively used (the wafer bonding step is mostly used to protect the MEMS sensitive element). And CMOS Image Sensors is also a very promising application for wafer bonders,” said Dr Eric Mounier, project manager at Yole.

Up to two different wafer bonding steps can be necessary for next-generation CMOS image sensors: one for back-side Illumination and the second for WLCSP. But besides MEMS and CIS, wafer bonder can be also used for LEDs or power devices.

In a typical LED active region, spontaneous emission scatters photons in all directions. If the substrate material has a smaller band gap than the active region, about half the light is absorbed in the substrate, reducing device performance.

So, one of the manufacturing solutions for photon loss involves bonding a wafer containing an array of devices to another wafer that provides both a reflective surface for maximum light extraction and a heat sink for thermal management.

For MEMS, there is a shift from glass frit for eutectic/metal-based bonding mainly to increase real estate by smaller bond frames. Metal direct bonding also gives good hermeticity and mechanical stability for many MEMS applications.

For example, the Nasiri process is using eutectic bonding of the MEMS directly on the aluminium layer of the CMOS wafer. This leads to smaller package footprints and package heights.

For CMOS Image sensors, the advent of the BSI (back-side illumination) technology has raised a competition between molecular bonding and adhesive bonding. Here, cost and final application will drive the final choice.

Yole has estimated the wafer bonder to have big market growth for the next year. The growth will be driven by small size wafers for LEDs and 12″ wafer for 3D stacking and CIS.