Riber and Imec extend CMOS deal

Monday, 23 April, 2012

Riber, a supplier of molecular beam epitaxy equipment and services to the compound semiconductor industry, has signed an agreement with Imec to further collaborate on epitaxy process technologies for next-generation III-V CMOS devices.

The agreement follows a collaboration in the field of channel materials for high-performance CMOS scaling, germanium and compound semiconductor materials.

In the quest for miniaturisation, technology has come to a point where CMOS scaling beyond the 45 nm node cannot be achieved by reducing transistor dimensions.

Moreover, the need for small form factors coupled with the stringent requirement of low current leakage/low energy performance has become critical, especially in next-generation mobile devices.

Within Imec’s germanium and III-V devices program, Imec and its core partners are exploring the efficacy of high-mobility channel materials for CMOS devices for advanced nodes.

Together with Riber, the bottleneck issue of gate stack passivation was tackled, resulting in effective passivation techniques for Ge and GaAs. Riber’s 200 mm III-V and metal oxide MBE cluster offered the required extremely clean background and absence of any interfering gas phase components, enabling material and interface control on the atomic level.

This resulted in the development of a passivation scheme for the MOS gate stack module. Among others, it was shown that controlling the GaAs surface reconstruction followed by H2S passivation and in-situ high-k deposition was crucial to create a well-passivated MOS structure with record-low interfacial state density. The world’s first successful MOS capacitors on a new high-mobility candidate material, GeSn, were made in the 200 mm Riber MBE cluster.

In the new project, the suitability of Riber’s 300 mm UHV chamber (ISA300), equipped with in-situ tools for surface analysis and clustered with 300 mm Si CMOS production equipment, will be evaluated for producing advanced CMOS devices based on high-mobility Ge and IIIV channels.

The aim of the project is threefold: 1) use Riber’s UHV chamber for study and control of surface structures; 2) bring knowledge on gate stack passivation from a 200 mm research environment to a 300 mm fab compatible platform; 3) demonstrate the technological viability of a 300 mm MBE-module, clustered with ‘standard’ 300 mm Si CMOS production equipment.

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